Talking to memory: Inside the Intel 8088 processor's bus interface state machine

The designers of the IBM PC selected the 8088 for multiple reasons, but a key factor was that the 8088 processor's 8-bit bus was similar to the bus of the 8085 processor. 1 The designers were familiar with the 8085 since they had selected it for the IBM System/23 Datamaster, a now-forgotten desktop computer, making the more-powerful 8088 processor an easy choice for the IBM PC. The 8088 processor communicates over the bus with memory and I/O devices through a highly-structured sequence of steps called "T-states." A typical 8088 bus cycle consists of four T-states, with one T-state per clock cycle. Although a four-step bus cycle may sound straightforward, its implementation uses a complicated state machine making it one of the most difficult parts of the 8088 to explain. The key difference is that the 8088 has an 8-bit data bus for communication with memory and I/O, rather than the 16-bit bus of the 8086. As the timing diagrams above show, the processor issues the memory address during state T1 of the bus cycle. A complication is that the 8088 indicates the HALT state to external devices by performing a special T1 bus cycle without any following bus cycles. The bus state machine is a key part of the read and write circuitry, moving the bus operation through the necessary T-states.